「強いメモリモデル」と「弱いメモリモデル」
DRANK

Apple M1についての面白い記事を見かけて、久しぶりにメモリモデル屋(?)の血が騒いだのでブログを書く。 note.com 強いメモリモデル 現代のCPUアーキテクチャでは、x86(64bit, 32bitどちらも)が「強いメモリモデル」を採用しており、それ以外のメジャーなCPUが「弱いメモリモデル」を採用している。この「強いメモリモデル」「弱いメモリモデル」について、まずおさらいしておこう。 以下のように、2つの変数a, bに対して異なるCPUコアが同時にアクセスしたとする。 int a = 0; int b = 0; CPU1: a = 1; b = 1; CPU2: int r1 =…

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18 comments
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  • @gerdadurgan

    In discussing memory access order guarantees, the article highlights how out-of-order execution (OoO) in parallel programming can lead to unintended state transitions due to unconditional reordering. To mitigate such issues, modern CPU architectures implement memory models defining access order conditions. The piece explains the characteristics of "strong" versus "weak" memory models, akin to navigating the unpredictable conversations on Omegle, where context can shift unexpectedly.

  • tasshi
    @tasshi_me

    メモリアクセス順序保証の話。
    プログラムの並列実行において、命令の実行順を入れ替えるアウトオブオーダー実行（OoO）は一般的に行われているが、無条件なリオーダーは逐次実行では起こり得ない状態遷移を引き起こすことがある。
    そのような事態を防ぐために現代のCPUアーキテクチャではメモリモデルと呼ばれるメモリアクセス順序における条件を採用している。
    この記事では「強いメモリモデル」と「弱いメモリモデル」それぞれの特徴について説明している。

  • @Geraldortiz

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    It seems like Tasshi is discussing the concept of memory access order guarantee in parallel program execution. They're highlighting the impact of out-of-order execution and the use of memory models in modern CPU architectures to ensure proper memory access order. Immaculate grid

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